Company
design-reuse.com
D&R China
Blogs
Industry Articles
D&R Events
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC Days 2020
IP-SoC Days 2019
Videos
Subscribe to D&R SoC News Alert
English
Mandarin
Login
Catalog of SIP Cores
System on Chip design resources
Catalog of SIP Cores
System on Chip design resources
Menu
Home
Search IP Core
News
Blogs
Articles
D&R Events
Videos
Subscribe to D&R SoC News Alert
Login
News
Center
Foundation IP
Analog IP
Interface IP
Interconnect IP
Memory Controller & PHY
Peripheral Controller
Wireless IP
Wireline IP
Processor IP
RISC-V
AI Core
Automotive IP
Security IP
IoT
Media IP
Avionics / Space IP
Verification IP
Verification Platform
Design Platform
Asic & IP Design Center
IP-SoC Days
IP-SoC Days 2026
IP-SoC Days 2025
IP-SoC Days 2024
IP-SoC Days 2023
IP-SoC Days 2022
IP-SoC Days 2021
IP-SoC Days 2020
IP-SoC Days 2019
Browse Foundation
Arithmetic & Mathematic (46)
Embedded Memories (996)
I/O Library (1032)
PLL (1746)
Standard cell (756)
CAM (30)
Diffusion ROM (3)
DRAM (1)
Dual-Port SRAM (30)
EEPROM (30)
Flash Memory (37)
FTP (8)
Metal ROM (1)
MTP (39)
OTP (163)
RAM (236)
Register File (241)
ROM (76)
RRAM (6)
Single-Port SRAM (49)
Via ROM (26)
Other (20)
ESD Protection (71)
General-Purpose I/O (GPIO) (447)
High-speed (136)
LVDS (74)
Memory Interfaces (16)
Special (288)
Clock Generator PLL (405)
Deskew PLL (356)
Frac-N PLL (58)
General Purpose PLL (484)
IoT PLL (48)
Low Bandwidth PLL (3)
Low Power PLL (14)
MIPI D-PHY (1)
Spread Spectrum PLL (377)
You must be registered with the D&R website to view the full search results, including:
Complete datasheets for
IP Core
products
Contact information for
IP Core
suppliers
Please
log in
here to your account.
New user ?
Signup here
.
1032 IP
201
1.0
VeriSilicon SMIC 0.18μm 1.8V/3.3V ANALOGIO_05 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V ANALOGIO_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporati...
202
1.0
VeriSilicon SMIC 0.18μm 1.8V/3.3V CFIO_01 Library
VeriSilicon SMIC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for SMIC 0.18μm 1P6M Salicide logic process. This library suppo...
203
1.0
VeriSilicon SMIC 0.18µm 1.8V/3.3V VPPIO_01 IO Library
VeriSilicon SMIC 0.18um 1.8V/3.3V VPPIO_01 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation ...
204
1.0
VeriSilicon TSMC 0.13¦Ìm 1.2V/2.5V DUPIO_01 Library
VeriSilicon TSMC 0.13¦Ìm 1.2V/2.5V DUP I/O Cell Library developed by VeriSilicon is optimized for Taiwan Semiconductor Manufacturing Company (TSMC) 0....
205
1.0
VeriSilicon TSMC 0.13¦Ìm 1.2V/3.3V DUPIO_01 Library
VeriSilicon TSMC 0.13¦Ìm 1.2V/3.3V DUP I/O Cell Library developed by VeriSilicon is optimized for Taiwan Semiconductor Manufacturing Company (TSMC) 0....
206
1.0
VeriSilicon UMC 0.18μm CF I/O
VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II logic process...
207
1.0
VeriSilicon UMC 0.18μm CF I/O
VeriSilicon UMC 0.18μm CF I/O Cell (01) Library developed by VeriSilicon is optimized for UMC 0.18μm 1.8v/3.3v 1P6M Generic II logic process. This lib...
208
1.0
TF55: 0.9V/1.2V SoundWire audio I/O Library with auto-delay calibration, TSMC 55nm LP
A silicon-proven 0.9V/1.2V SoundWire I/O library in TSMC 55nm LP — the next-generation, lower-voltage companion to the 0.9V/2.5V TE55, with added auto...
209
1.0
TG28: Fail-Safe 1.8V/3.3V Multi-Voltage GPIO with embedded XTAL oscillator, TSMC 28nm
A silicon-proven, fail-safe digital I/O library in TSMC 28nm with a triple-staggered wirebond architecture supporting multi-voltage, multi-protocol GP...
210
1.0
DG28: Switchable 1.8V/3.3V GPIO with 5V I2C ODIO, HDMI/LVDS protection, analog & OTP, TSMC 28nm
A silicon-proven, high-volume-production I/O library in TSMC 28nm (HPM/HPC/HPC+) that detects and dynamically adapts to a 1.8V or 3.3V VDDIO supply du...
211
1.0
VG28: Switchable 1.8V/3.3V GPIO, TSMC 28nm
A silicon-proven, inline wirebond I/O library in TSMC 28nm that detects and dynamically adapts to a 1.8V or 3.3V VDDIO supply during operation. The GP...
212
1.0
HHGrace 0.11um LP Multiple Power Supply IO library
Multiple power supply IO library for HHGrace 0.11um Eflash Low Power Dual Gate ( 1.5V/5V ) process...
213
1.0
HHGrace 0.11um LP Multiple Power Supply IO library
...
214
1.0
HHGrace 0.11um ULL Multiple power supply IO library
Multiple power supply IO library for HHGrace 0.11um Eflash Ultra Low Leakage Dual Gate ( 1.5V/5V ) process...
215
1.0
HHGrace 0.13um LP DG Multiple Power Supply IO library
Multiple power supply IO library for HHGrace 0.13um Eflash Low Power Dual Gate ( 1.5V/5V ) process...
216
1.0
Silterra 0.11um ULL Process Multiple power supply IO library with high voltage tolerance
Silterra 0.11um Ultra Multiple power supply IO Library with high voltage tolerance...
217
1.0
Silterra 0.18um ULL Process Multiple power supply IO library with high voltage tolerance
Silterra 0.18um Ultra Multiple power supply IO Library with high voltage tolerance...
218
1.0
AJ65: I2C/I3C fail-safe GPIO wirebond digital & analog library, TSMC 65nm
A silicon-proven, mixed digital and analog wirebond I/O library in TSMC 65nm, built around a fail-safe GPIO (FSGPIO) cell with full I2C and I3C compli...
219
1.0
HLMC 55nm LP Multiple Power Supply IO library
Multiple power supply IO library for Huali55nm low power 1.2v/2.5v process...
220
1.0
GLOBALFOUNDARIES 22nm FDSOI LVDS Transceiver Pad
The LVDS IO library provides IO cells for LVDS transmitter and receiver. The transmitter (TX) supports LVDS differential driver mode, and the receiver...
221
1.0
GlobalFoundries 0.13um 2.5v IO Library
Global Foundry 0.13um process 1.2v/2.5v Generic IO library...
222
1.0
GlobalFoundries 0.13um 3.3v IO library
Global Foundry 0.13um process 1.2v/3.3v Generic IO library...
223
1.0
GLOBALFOUNDRIES 28nm SLP 1.8v/1.0v SUBLVDSTX
...
224
1.0
GLOBALFOUNDRIES 28nm SLP Multiple Power Supply IO library
Multiple power supply IO library for GF28nm low power 1.0v/2.5v process...
225
1.0
GLOBALFOUNDRIES 28nm SLP sub-LVDS Receiver
The sub-LVDS Receiver IP is designed as an interface to bridge Video Image Sensors and processors. The receiver consists of PHY only....
226
1.0
GLOBALFOUNDRIES 65nm LVDS Transmitter
The LVDS transmitter is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
227
1.0
AM11: Switchable 1.8V/3.3V fail-safe GPIO with 5V ODIO, OTP & analog, Samsung 11nm
A Samsung 11nm (LPP) flip-chip I/O library that detects and dynamically adapts to a 1.8V or 3.3V VDDIO supply during operation, with fail-safe GPIO. T...
228
1.0
AM130: 5V GPIO, ODIO, analog & power-supply I/O library, TSMC 130nm 5V Gen3 BCD
A silicon-proven, wirebond/flip-chip-compatible I/O library in TSMC 130nm 5V Gen3 BCD, with 5V GPIO, ODIO, analog, and power-supply I/O plus an area-e...
229
1.0
UMC 0.18um IO Library
UMC 0.18um process 1.8v/3.3v Generic IO library...
230
1.0
SMIC 0.13um 1.2V/2.5V ANALOGIO_05 IO Library
VeriSilicon SMIC 0.13um 1.2V/2.5V ANALOGIO_05 IO library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporati...
231
1.0
SMIC 0.13um 1.2V/3.3V ONFI and MultIO combo IO
VeriSilicon SMIC 0.13μm ONFI COMBO I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporati...
232
1.0
SMIC 0.13um Crystal Oscillator IO
This IP is a crystal oscillator DUP IO pad designed for low-power consumption applications. The pierce oscillator works in parallel mode and supports ...
233
1.0
SMIC 0.13um General Process, 1.2V/2.5V Standard I/O Library
VeriSilicon SMIC 0.13um 1.2V/2.5V I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SM...
234
1.0
SMIC 0.13um General Process, 1.2V/3.3V Standard I/O Library
VeriSilicon SMIC 0.13um 1.2V/3.3V I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SM...
235
1.0
SMIC 0.13um IO Library
SMIC 0.11um process1.2v/3.3v Generic IO library...
236
1.0
SMIC 0.13um IO Library
SMIC 0.13um process 1.2v/3.3v Generic IO library...
237
1.0
SMIC 0.13um LL IO Library
SMIC 0.13um LL process 1.2v/3.3v Generic IO library...
238
1.0
SMIC 0.13um LVDS Receiver
The LVDS Receiver IP is designed to support Single Link transmission between Host and Flat Panel Display with up to SXGA+ resolution and Dual Link tra...
239
1.0
SMIC 0.13um LVDS Transmitter
The LVDS transmitter converts 28-bit data into 4-pair LVDS data stream. A phase-locked transmit clock is transmitted in parallel with the data stream ...
240
1.0
SMIC 0.13μm 3.3V Switchable Power Control Block
The present IP schemes a Voltage Detector (VDT) circuit. With the on-chip Bandgap reference, it detects the input voltage, i.e., VIN. It will output “...
241
1.0
SMIC 0.15um IO Library
SMIC 0.15um process 1.5v/3.3v Generic IO library...
242
1.0
SMIC 0.15um SSTL2
VeriSilicon SMIC 0.15um 1.5V/3.3V SSTL2 I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporati...
243
1.0
SMIC 0.15um SSTL3
VeriSilicon SMIC 0.15um 1.5V/3.3V SSTL3 I/O Cell Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporati...
244
1.0
SMIC 0.16um IO Library
SMIC 0.16um process 1.8v/3.3v Generic IO library...
245
1.0
SMIC 0.16um LL IO Library
SMIC 0.16um LL process 1.8v/3.3v Generic IO library...
246
1.0
SMIC 0.18um 1.8V/3.3V DUP I/O Library
VeriSilicon SMIC 0.18um 1.8V/3.3V DUP I/O Library developed by VeriSilicon is optimized for Semiconductor Manufacturing International Corporation (SMI...
247
1.0
SMIC 0.18um Crystal Oscillator IO_01
This crystal oscillator IO pad is designed for 1.8V OSC power supply. The IO gives clock signal under 1.8V power supply. The Pierce oscillator works i...
248
1.0
SMIC 0.18um IO Library
SMIC 0.18um process 1.8v/3.3v Generic IO library...
249
1.0
SMIC 0.18um IO Library
...
250
1.0
SMIC 0.18um LL 5v IO Library
SMIC 0.18um LL process 1.8v/5v Generic IO library...
|
Previous
|
5
|
6
|
7
|
...
|
Next
|